NEETI; DAHIYA, Sunita. Area and delay trade offs in fracturable LUT-based FPGA architectures. Journal of Integrated Science and Technology, [S. l.], v. 12, n. 2, p. 733, 2023. Disponível em: https://pubs.thesciencein.org/journal/index.php/jist/article/view/a733.. Acesso em: 22 jul. 2024.