CPU scheduling algorithms performance analysis in the RISC-V xv6 operating system environment

RISC-V xv6 operating system CPU analysis

Authors

  • Dr. Madan H T NITTE (Deemed to Be University), NMAM Institute of Technology, Nitte, Karnataka
  • Dr. Manjunatha H.M. Bapuji Institute of Engineering and Technology, Davanagere, Karnataka, India. https://orcid.org/0000-0001-6651-7131
  • Dr. Nagaraja Rao Pradeep Sri Siddhartha Institute of Technology, Sri Siddhartha Academy of Higher Education, Tumakuru, Karnataka, India
  • Vidyashankar M J N N College of Engineering, Shimoga, Karnataka, INDIA

DOI:

https://doi.org/10.62110/sciencein.jist.2025.v13.1053

Keywords:

Process scheduling, xv6 Operating System, RISC-V Architecture, Round Robin, First-Come-First-Serve

Abstract

Process scheduling is a crucial element of operating systems, which has a significant impact on system performance and the efficient use of resources. This paper includes a study of scheduling algorithms implemented in xv6, which is a Unix-like operating system designed specifically for educational purposes. This paper examines the specificities and operational attributes of Round Robin, First-Come-First-Serve, and Priority-Based Scheduling. The functionality of xv6 is enhanced by integrating system call tracing, a debugging tool that intercepts and logs system calls invoked by programs during execution. The strace system function can be implemented in a comprehensive manner, allowing for selective tracing depending on a mask given by the user. The procdump software offers detailed information on the present condition of running processes, encompassing their execution durations, waiting durations, and queue durations. Benchmarking and performance analysis provide a quantitative evaluation of the trade-offs linked to each scheduling policy. The results indicate that the First-Come-First-Serve scheduler has the lowest average waiting time, while the Round Robin and Priority-Based Scheduling schedulers have larger waiting times due to the additional overhead of preemption and priority-based selection.

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Author Biographies

  • Dr. Madan H T, NITTE (Deemed to Be University), NMAM Institute of Technology, Nitte, Karnataka

    Department of Electronics and Communication (Advanced Communication Technology),
    NMAM Institute of Technology, Nitte, Karkala Taluk,  Udupi, 574110, Karnataka, India. 

  • Dr. Manjunatha H.M., Bapuji Institute of Engineering and Technology, Davanagere, Karnataka, India.

    Electrical and Electronics Engineering

  • Dr. Nagaraja Rao Pradeep , Sri Siddhartha Institute of Technology, Sri Siddhartha Academy of Higher Education, Tumakuru, Karnataka, India

    Electrical and Electronics Engineering

  • Vidyashankar M , J N N College of Engineering, Shimoga, Karnataka, INDIA

    Electrical and Electronics Engineering

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Published

2024-12-10

Issue

Section

Engineering

URN

How to Cite

H T , M., H M, M., Pradeep , N. R. ., & M , V. . (2024). CPU scheduling algorithms performance analysis in the RISC-V xv6 operating system environment. Journal of Integrated Science and Technology, 13(3), 1053. https://doi.org/10.62110/sciencein.jist.2025.v13.1053

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